Synopsys, Inc. Announces 15th EDA Interoperability Developers' Forum Featuring Wide Array of Industry Topics and Initiatives

MOUNTAIN VIEW, Calif., March 30 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced its 15th biannual Electronic Design Automation (EDA) Interoperability Developers' Forum, featuring a keynote address, titled, "The Value of Interoperability," delivered by Mark Templeton, the president of ARM, Inc., North America, and an afternoon session focused on SystemVerilog.

  WHAT:      This full-day event provides EDA vendors and their customers
             an opportunity to exchange information and ideas on EDA tool
             interoperability, including new interface technologies, future
             enhancements, upcoming news, and successes. This forum is the
             only open event that focuses on a wide range of industry
             standards and initiatives from organizations such as Accellera,
             EDA Consortium, IEEE, and SPIRIT Consortium, as well as
             Synopsys open formats and programs.

             For more information and to register, visit
             http://www.synopsys.com/devforum/apr2005.

  WHEN:      April 7, 2005, 10:15 a.m.

  WHERE:     The EDA Developers' Forum will take place at the Sun
             Conference Center, located in Santa Clara, California at Agnews
             Historic Park. The conference center is located at 4030 George
             Sellon Circle, Santa Clara, CA, 95054.

  WHO ATTENDS:         EDA Vendors and their customers, design engineers,
                       and members of the media.

  SEMINAR DETAILS:
   The 15th EDA Interoperability Developers' Forum

The upcoming Forum will feature a keynote address, titled, "The Value of Interoperability," delivered by Mark Templeton, president of ARM, Inc., North America. The forum will also highlight a panel on: "Interoperability: Does It Pay to Play Nice? (or Do Nice Guys Finish Last?)," moderated by Kathryn Kranen, president and CEO of Jasper Design Automation, and featuring representatives from the financial and investment community as well as from EDA companies.

During the afternoon, the SystemVerilog Session will highlight the latest information on the language. Hear from users, language experts and vendors on where SystemVerilog is today and where it is headed. The Forum will include presentations on users' experiences, SystemVerilog's advanced verification features, including assertions and testbench, and assertion-based hardware emulation.

  HOW TO REGISTER:     For more information and to register, visit
                       http://www.synopsys.com/devforum/apr2005/.

  About Synopsys

Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

NOTE: Synopsys is a registered trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

  CONTACT:
   Pierre Golde
   Synopsys, Inc.
   (650) 584-4194
   golde@synopsys.com

CONTACT: Pierre Golde of Synopsys, Inc., +1-650-584-4194, or
golde@synopsys.com

Web site: http://www.synopsys.com/